Backlog at the three biggest semiconductor equipment firms has reached a record $115 billion, driven almost entirely by AI‑related logic chips and advanced packaging projects. The figure eclipses the previous high and signals that capital is flowing into the most advanced layers of the supply chain.
ASML, the sole supplier of high‑numerical‑aperture extreme ultraviolet (High‑NA EUV) tools, reports its order book is fully booked through 2027. The company is already negotiating delivery slots for 2028 with the three leading foundries, TSMC, Samsung and Intel. Those talks lock in demand for the next generation of lithography that will enable sub‑3‑nanometer nodes and the massive transistor counts required for generative AI models.
Applied Materials and Lam Research, the other two pillars of the backlog, see the same AI‑driven surge. Applied Materials’ deposition and etch systems are tied to the same logic wafers that need High‑NA EUV exposure. Lam Research’s advanced packaging equipment is essential for stacking memory and compute dies, a technique that reduces latency and power consumption for AI workloads. Both firms report that more than three quarters of new orders reference AI or advanced packaging.
The geographic composition of the backlog is shifting. Chinese fabs still account for a meaningful share of equipment spend, but U.S. export controls have trimmed the growth rate. Restrictions on High‑NA EUV and certain advanced packaging tools limit the ability of Chinese manufacturers to upgrade to the latest nodes. The result is a slower build‑out in China and a reallocation of funds toward regions where technology transfer is permitted.
In the United States, the CHIPS Act is translating into tangible order flow. Federal subsidies and tax incentives have spurred new fab projects and expansions at existing sites. Applied Materials and Lam Research cite U.S. capacity projects as the primary source of incremental demand beyond the AI surge. The policy environment therefore adds a layer of predictability to future equipment bookings.
For allocators, the record backlog changes the risk‑return calculus of semiconductor exposure. The backlog represents committed revenue that will materialize over the next five years, reducing earnings volatility for the equipment makers. At the same time, the concentration of demand in a narrow set of high‑margin products raises the stakes of any supply‑chain disruption.
Supply constraints remain a key variable. High‑NA EUV tools are complex, with each machine taking more than a year to assemble and test. Any delay in component deliveries or workforce shortages could push out the 2028 slots that TSMC, Samsung and Intel are currently negotiating. Investors should monitor ASML’s capacity expansion plans and the availability of critical optics and laser subsystems.
Capital allocation decisions within the equipment sector are also being reshaped. Both Applied Materials and Lam Research are accelerating investments in next‑generation deposition, etch and packaging platforms that support heterogeneous integration. Those programs require significant R&D spend, but they also promise higher pricing power as customers chase performance gains for AI inference.
Overall, the $115 billion backlog underscores a structural shift toward AI‑centric semiconductor production. Funds with exposure to the equipment chain can expect a multi‑year earnings tailwind, provided they navigate export‑control risk and supply‑chain bottlenecks. The record level of committed orders offers a clear signal to capital providers: the industry is moving deeper into advanced nodes, and the equipment makers that sit at the front of that pipeline are positioned to capture the upside.